Overview of the Architecture, Circuit Design, and Physical Implementation of a First-Generation Cell Processor

Pham, D.; Aipperspach, T.; Boerstler, D.; Bolliger, M.; Chaudhry, Rajat; Cox, D.; Harvey, Paul; McA. Harvey, Paul; Peter Hofstee, H.; Johns, C.; Kahle, J.; Kameyama, Atsushi; Keaty, J.; Masubuchi, Yoshio; Pham, M.; Pille, J.; Posluszny, S.; Riley, M.; Stasiak, D.; Suzuoki, M.; Takahashi, Osamu; Warnock, J.; Weitzel, S.; Wendel, D.; Yazawa, Kazuaki

doi:10.1109/jssc.2005.859896

Public

Overview of the Architecture, Circuit Design, and Physical Implementation of a First-Generation Cell Processor

Published in IEEE Journal of Solid-State Circuits • Dec 28, 2005

Authors:

D. Pham

T. Aipperspach

D. Boerstler

Abstract

This paper reviews the design challenges that current and future processors must face, with stringent power limits, high-frequency targets, and the continuing system integration trends. This paper then describes the architecture, circuit design, and physical implementation of a first-generation Cell...

Subject

Computer science

Modularity (biology)

Computer architecture

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