Optimizing p-type ultra-shallow junctions for the 65 nm CMOS technology node

The limits of using B or BF 2 alone in forming ultrashallow junctions have been reached for the 90 nm CMOS generation. In this paper we evaluate the use of Ge and F co-implants to extend conventional implantation and spike anneal to the 65 nm CMOS technology node. In this work we show that the F co-... View More