VLSI module placement based on rectangle-packing by the sequence-pair

Murata, Hideyuki; Fujiyoshi, Kunihiro; Nakatake, Shigetoshi; Kajitani, Yoji

doi:10.1109/43.552084

Public

VLSI module placement based on rectangle-packing by the sequence-pair

Published in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems • Jan 1, 1996

Authors:

Hideyuki Murata

Kunihiro Fujiyoshi

Shigetoshi Nakatake

Abstract

The earliest and the most critical stage in VLSI layout design is the placement. The background is the rectangle packing problem: given a set of rectangular modules of arbitrary sizes, place them without overlap on a plane within a rectangle of minimum area. Since the variety of the packing is uncou...

Subject

Rectangle

Very-large-scale integration

Simulated annealing

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